Regarding your specific Intel chip question - as far as I can tell (the datasheet link seems dead), that chip is a MAC, with PCIe. There are also many more varieties of interfaces used in other circumstances, may of which are linked to from the Wikipedia MII page:
A very reduced pincount version called SGMII is also available ('S' for serial) which requires special capabilities on the IO pins of the MAC, whereas the other xMIIs are relatively conventional logic signals. A version using less pins is also available, RMII ('R' for reduced).įor gigabit speeds, the GMII ('G' for gigabit) interface is used, with a reduced pincount version called RGMII. The MII was standardised a long time ago and supports 100Mbit/sec speeds. Just a standard set of pins between the MAC and the PHY, so that the MAC doesn't have to know or care what the physical medium is, and the PHY doesn't have to know or care how the host processor interface looks. Often interfaces to the host processor over something like PCI Express (for example). This is the part of the system which converts a packet from the OS into a stream of bytes to be put on the wire (or fibre).
